Emulation Architect

Wipro Limited (NYSE: WIT, BSE: 507685, NSE: WIPRO) is a leading technology services and consulting company focused on building innovative solutions that address clients’ most complex digital transformation needs. Leveraging our holistic portfolio of capabilities in consulting, design, engineering, and operations, we help clients realize their boldest ambitions and build future-ready, sustainable businesses. With over 230,000 employees and business partners across 65 countries, we deliver on the promise of helping our customers, colleagues, and communities thrive in an ever-changing world. For additional information, visit us at www.wipro.com.

Job Description

Role Purpose

The purpose of the role is to design, and architect VLSI and Hardware based products and enable delivery teams to provide exceptional client engagement and satisfaction.
 

E͏mulation Architect

Emulation Architect (ZeBu / HAPS)

Experience

15+ years

Location

Bangalore, Hyderabad, Kochi, Chennai, Pune

Domain

ASIC / SoC – Turnkey Silicon

Employment

Full-time

The Role

Define emulation and FPGA-prototyping strategy for complex SoCs, owning design partitioning, platform bring-up and pre-silicon validation predominantly on Synopsys ZeBu and HAPS.

What You Will Do

• Define emulation and prototyping strategy: platform selection (ZeBu / HAPS), capacity planning and milestones.
• Own design partitioning, multi-FPGA / multi-board mapping, clocking, timing and interconnect for emulation targets.
• Drive ZeBu and HAPS compile flows, bring-up, runtime performance and debug visibility.
• Build transactor, co-emulation and virtual-platform environments for firmware, OS and system-level validation.
• Run hardware/software co-validation, power and performance analysis, and regression automation on emulators.
• Partner with RTL, DV, DFT and SW teams; mentor emulation engineers and lead customer technical reviews.

What You Bring

• 15+ years in ASIC/SoC pre-silicon validation, with 8+ years of hands-on ZeBu and HAPS emulation / prototyping.
• Proven delivery of multiple SoC emulation or prototyping programs, from compile through system bring-up.
• Expert in design partitioning, FPGA-friendly RTL, clock and memory mapping, and emulation timing closure.
• Strong with AMBA (AXI/AHB/APB), PCIe, Ethernet, USB and DDR/LPDDR subsystems and their emulation models.
• Experience with ARM- or RISC-V-based SoC bring-up, firmware integration and OS boot on emulators.
• Scripting and automation in Python, Tcl or Perl; ability to debug at waveform, trace and system level.

Good to Have

• Palladium or Veloce exposure
• Hybrid emulation, virtual platforms and transaction-level co-simulation
• Post-silicon bring-up and chiplet / multi-die validation

E͏mulation Architect

• Emulation Architect (ZeBu / HAPS)

  Experience

  15+ years

  Location

  Bangalore, Hyderabad, Kochi, Chennai, Pune

  Domain

  ASIC / SoC – Turnkey Silicon

  Employment

  Full-time

  The Role

  Define emulation and FPGA-prototyping strategy for complex SoCs, owning design partitioning, platform bring-up and pre-silicon validation predominantly on Synopsys ZeBu and HAPS.

  What You Will Do

  • Define emulation and prototyping strategy: platform selection (ZeBu / HAPS), capacity planning and milestones.
  • Own design partitioning, multi-FPGA / multi-board mapping, clocking, timing and interconnect for emulation targets.
  • Drive ZeBu and HAPS compile flows, bring-up, runtime performance and debug visibility.
  • Build transactor, co-emulation and virtual-platform environments for firmware, OS and system-level validation.
  • Run hardware/software co-validation, power and performance analysis, and regression automation on emulators.
  • Partner with RTL, DV, DFT and SW teams; mentor emulation engineers and lead customer technical reviews.

  What You Bring

  • 15+ years in ASIC/SoC pre-silicon validation, with 8+ years of hands-on ZeBu and HAPS emulation / prototyping.
  • Proven delivery of multiple SoC emulation or prototyping programs, from compile through system bring-up.
  • Expert in design partitioning, FPGA-friendly RTL, clock and memory mapping, and emulation timing closure.
  • Strong with AMBA (AXI/AHB/APB), PCIe, Ethernet, USB and DDR/LPDDR subsystems and their emulation models.
  • Experience with ARM- or RISC-V-based SoC bring-up, firmware integration and OS boot on emulators.
  • Scripting and automation in Python, Tcl or Perl; ability to debug at waveform, trace and system level.

  Good to Have

  • Palladium or Veloce exposure
  • Hybrid emulation, virtual platforms and transaction-level co-simulation
  • Post-silicon bring-up and chiplet / multi-die validation

͏

Deliver

No. Performance Parameter Measure 1. Product design, engineering and implementation CSAT, quality of design/ architecture, FTR, delivery as per cost, quality and timeline, POC review and standards 2. Capability development % trainings and certifications completed, mentor technical teams, Thought leadership content developed (white papers, Wipro PoVs)

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Mandatory Skills: ASIC Design . Experience: >10 YEARS . Reinvent your world. We are building a modern Wipro. We are an end-to-end digital transformation partner with the boldest ambitions. To realize them, we need people inspired by reinvention. Of yourself, your career, and your skills. We want to see the constant evolution of our business and our industry. It has always been in our DNA - as the world around us changes, so do we. Join a business powered by purpose and a place that empowers you to design your own reinvention.