Senior Designer
On-site
Vietnam
Job Summary
B.Tech / M.Tech with 2 to 4 years of experience exclusively in DFT.
Strong Digital and STA, VLSI flow, Verilog, Scripting concepts.
Key Responsibilities
Block or Sub-system level:
Hands-on experience to do scan insertion, ATPG DRC, Coverage Analysis, Pattern Generation/Simulation.
Should have expertise on Simulation debug No-timing/Timing.
Skill Requirements
Block or Sub-system level:
Hands-on Experience to do MBIST Verification, DFX feature verification, Pattern generation.
Working knowledge of JTAG, iJTAG, ICL, PDL etc.
Other Requirements
Good at Communication, self driven VLSI professional
Source: the employer's careers page. Last checked 2026-10-26. Posted 2026-10-26.
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